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| 74LVQ4066 QUAD BILATERAL SWITCH s s s s s s s HIGH SPEED: tPD = 0.4 ns (TYP.) at VCC = 3.3 V tPD = 0.1 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION: ICC = 2A (MAX.) at TA=25C LOW "ON " LOW RESISTANCE RON = 14 at VCC = 3.3V, II/O < 1 mA RON = 12 at VCC = 5.0V, II/O < 1 mA SINE WAVE DISTORTION: 0.04% at VCC = 3.3V, f = 1KHz OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4066 IMPROVED LATCH-UP IMMUNITY SOP TSSOP Table 1: Order Codes PACKAGE SOP TSSOP T&R 74LVQ4066MTR 74LVQ4066TTR DESCRIPTION The 74LVQ4066 is a low voltage CMOS QUAD BILATERAL SWITCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications and each switch is designed to handle both analog and digital signals. The switches permit signals with amplitudes up to VCC (peak) to be transmitted in either direction without relevant propagation delay and without generating additional ground bounce noise. It has an ON-Resistance which is greatly reduced in comparison with 74HC4066. It is provided of four individual enable inputs to control the switches; the switch is ON when the C input is held high and OFF (High Impedance) when C is held low. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols July 2004 Rev. 8 1/12 74LVQ4066 Figure 2: Logic Diagram Table 2: Pin Description PIN N 1, 4, 8, 11 2, 3, 9, 10 13, 5, 6, 12 7 14 SYMBOL 1 to 4 I/O 1 to 4 O/I 1C to 4C GND VCC NAME AND FUNCTION Independent Input/Output Independent Output/Input Enable Input (Active HIGH) Ground (0V) Positive Supply Voltage Table 3: Truth Table A H L (*) High Impedance B ON OFF* Table 4: Absolute Maximum Ratings Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 20 20 50 200 -65 to +150 300 Unit V V V mA mA mA mA C C ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions Symbol VCC VI VO Top dt/dv Supply Voltage (note 1) Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time on control pin VCC = 3.0V (note 2) Parameter Value 2 to 5.5 0 to VCC 0 to VCC -55 to 125 0 to 10 Unit V V V C ns/V 1) Truth Table guaranteed: 1.2V to 5.5V 2) VIN from 30% to 70%VCC 2/12 74LVQ4066 Table 6: DC Specifications Test Condition Symbol Parameter VCC (V) TA = 25C Min. 0.7 VCC 0.3 VCC 16.5 12 12 9.5 2 23 17 17 13 Typ. Max. Value -40 to 85C Min. 0.7 VCC 0.3 VCC 32 22 24 17 Max. -55 to 125C Min. 0.7 VCC 0.3 VCC 40 26 30 20 Max. V V Unit VIH VIL RON High Level Input Voltage Low Level Input Voltage ON Resistance 2.7 to 5.5 VI = VIH VI/O =VCC to GND II/O < 1mA 5.0(*) VI = VIH VI/O =VCC or GND II/O < 1mA 5.0(*) 3.3 (**) 3.3 (**) RON Difference of ON Resistance Between Switches Input/Output Leakage Current (SWITCH OFF) Switch Input Leakage Current (SWITCH ON, OUTPUT OFF) Control Input Leakage Current Quiescent Supply Current VI = VIH 3.0 to V =V to GND I/O CC 5.5 II/O < 1mA 5.5 VOS = VCC to GND VIS = VCC to GND VI = VIL VOS = VCC to GND VI = VIH VI = VCC or GND VI = VCC or GND IOFF 0.1 1.0 1.0 A IIZ 5.5 0.1 0.1 2 1.0 1.0 20 1.0 1.0 20 A A A IIN ICC 5.5 5.5 (*)Voltage range is 5V 0.5V (**)Voltage range is 3.3V 0.3V 3/12 74LVQ4066 Table 7: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 3.3(*) 5.0 (**) 3.3(*) 5.0 (**) 3.3(*) 5.0 (**) TA = 25C Min. Typ. 0.4 0.1 RL = 1 k 2.5 2.0 5.0 5.0 5 10 3.3 5.0 2.5 3 Max. 0.8 0.2 4.0 4.0 7.5 7.5 Value -40 to 85C Min. Max. 1.2 1.0 5.0 5.0 9.0 9.0 -55 to 125C Min. Max. 2.0 1.8 7.0 7.0 11.0 11.0 ns Unit tPD Delay Time tPZL tPZH tPLZ tPHZ CIN CI/O CPD Output Enable Time Output Disable Time Input Capacitance Switch Terminal Capacitance Power Dissipation Capacitance (note 1) ns RL = 1 k ns pF pF pF 1) CPD is defined as the value of the IC`s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPDxVCCxfIN+ICC/4 (Switch). (*) Voltage range is 3.3V 0.3V (*) Voltage range is 5V 0.5V Table 8: Analog Switch Characteristics (GND = 0 V, TA = 25C) Test Condition Symbol Parameter VCC (V) 3.3 5.0(*) 3.3 5.0(*) Feed through 3.3 Attenuation (Switch OFF) 5.0(*) Crosstalk (Control Input to Signal Output) Crosstalk (Between Any Switches) (*) Voltage range is 5V 0.5V VIN (Vp-p) 2.75 4 fIN = 1 KHz RL = 10K CL = 50 pF Value Unit Sine Wave Distortion (THD) fMAX Frequency Response (Switch ON) Adjust fIN voltage to Obtain 0dBm at VOS. Increase fIN Frequency until dB Meter reads -3dB RL = 50 , CL = 10pF VIN is centered at VCC/2. Adjust input for 0dBm RL = 600, CL = 50pF, FIN = 1 MHz sine wave RL = 600, CL = 50pF, fIN = 1MHz square wave RL = 600, CL = 50pF, fIN = 1MHz sine wave 0.04 0.04 150 180 -60 -60 60 60 -60 -60 % MHz dB mV dB 3.3 5.0(*) 3.3 5.0(*) 4/12 74LVQ4066 Figure 3: Switching Characteristics Test Circuit CROSSTALK (control to output) BANDWIDTH AND FEEDTHROUGH ATTENUATION MAXIMUM CONTROL FREQUENCY 5/12 74LVQ4066 Figure 4: Channel Resistance (RON) Figure 5: ICC (Opr.) 6/12 74LVQ4066 SO-14 MECHANICAL DATA DIM. A A1 A2 B C D E e H h L k ddd 5.8 0.25 0.4 0 mm. MIN. 1.35 0.1 1.10 0.33 0.19 8.55 3.8 1.27 6.2 0.50 1.27 8 0.100 0.228 0.010 0.016 0 TYP MAX. 1.75 0.25 1.65 0.51 0.25 8.75 4.0 MIN. 0.053 0.004 0.043 0.013 0.007 0.337 0.150 0.050 0.244 0.020 0.050 8 0.004 inch TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.344 0.157 0016019D 7/12 74LVQ4066 TSSOP14 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E E1 e K L 0 0.45 0.60 0.05 0.8 0.19 0.09 4.9 6.2 4.3 5 6.4 4.4 0.65 BSC 8 0.75 0 0.018 0.024 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 5.1 6.6 4.48 0.002 0.031 0.007 0.004 0.193 0.244 0.169 0.197 0.252 0.173 0.0256 BSC 8 0.030 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.201 0.260 0.176 inch A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 8/12 74LVQ4066 Tape & Reel SO-14 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.4 9 2.1 3.9 7.9 12.8 20.2 60 22.4 6.6 9.2 2.3 4.1 8.1 0.252 0.354 0.082 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.260 0.362 0.090 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 9/12 74LVQ4066 Tape & Reel TSSOP14 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.7 5.3 1.6 3.9 7.9 12.8 20.2 60 22.4 6.9 5.5 1.8 4.1 8.1 0.264 0.209 0.063 0.153 0.311 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.272 0.217 0.071 0.161 0.319 MIN. TYP. MAX. 12.992 0.519 inch 10/12 74LVQ4066 Table 9: Revision History Date 29-Jul-2004 Revision 8 Description of Changes Ordering Codes Revision - pag. 1. 11/12 74LVQ4066 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2004 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 12/12 |
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